PPI 0505C – Vertical Orientation
Measurement Conditions and Notes
This describes the considerations and measurement conditions used in the creation of the PPI 0505C capacitor series scattering matrices for vertically oriented parts. All comments apply to parts in the series microstrip configuration, i.e. capacitors that span a gap in the center trace of a microstrip transmission line and that have the planes of the electrodes parallel to the substrate surface.
Scattering parameters of multilayer ceramic capacitors mounted on microstrip substrates depend not only on the dielectric and electrode capacitor structure, but on a number of substrate-related parameters. These include: (1) substrate dielectric constant and thickness; (2) mounting pad and trace dimensions; and (3) capacitor orientation (internal electrode planes relative to the substrate surface), horizontal or vertical.
In consideration of the above, scattering matrices have been derived from electrical models created by Modelithics, Inc., a specialty vendor contracted by PPI. The models, derived from measurements on a large number of parts disposed on several different substrates, permit users to input substrate dielectric constant and thickness, landing pad dimensions, and — for some series – capacitor orientation. Detailed information is provided on the Modelithics model data sheet (found elsewhere on the PPI website) for each series. In all cases, the models are carefully vetted against experimental data. Measurements are made using coplanar probes; the coplanar-to-microstrip transitions, as well as any other structures between the probes and the capacitor-under-test mounting pad edges, are de-embedded using statistical TRL techniques.
Measurements are typically performed on a Vector Network Analyzer from 0.045 to 12 GHz for each capacitor value on each substrate. The scattering matrix is simply a text file; a sample is shown below:
# GHz S MA R 50
1.0800 0.003246 9.376196 0.9968 -8.122725 0.9968 -8.122725 0.003246 9.42346
1.0813 0.003303 10.56340 0.9968 -8.136674 0.9968 -8.136674 0.003303 10.6130
1.0825 0.003362 11.71266 0.9968 -8.150645 0.9968 -8.150645 0.003362 11.7644
1.0837 0.003423 12.82437 0.9967 -8.164638 0.9967 -8.164638 0.003423 12.8781
The first line is a header, designated by the “#” character. Succeeding characters describe respectively the frequency units, parameter, measurement format, and characteristic impedance of the measurement system in Ohms. The data is arranged as follows: The first column is the frequency, in the units specified in the header. The next two columns are S11 magnitude (again, as specified in the header) and S11 phase. Succeeding column pairs represent S12, S21, and S22.
It is important to understand that the upper frequency at which the scattering matrix is valid is either the 12 GHz measurement limit or the second parallel resonance of the device. Parallel resonances in the series microstrip configuration manifest as notches (“suckouts”) in S21 or S12, the insertion loss. Parallel resonances in the series microstrip configuration manifest as notches (“suckouts”) in S21 or S12, the insertion loss.
It should be noted that some software simulators may require that artificial data — e.g. 0 dB return losses and very large insertion losses — be added at zero frequency to avoid passivity or other issues. In general, caution is suggested when using software simulation, since many programs attempt to extrapolate scattering matrix data both below and above the frequencies where it is valid – and often arrive at grossly incorrect results.
Fig. 1 depicts a typical capacitor on the mounting pads of a microstrip substrate.
Fig. 1 A multilayer ceramic capacitor in a series configuration on a microstrip substrate
Reference planes are always at the pad edges, as shown. The following parameters apply:
Part Orientation: Vertical
Substrate: Rogers RO4350
Substrate dielectric constant: 3.66
Substrate thickness (mils): 25
PADG (mils): 15
PADL (mils): 20
PADW (mils): 55.2
50-Ohm Trace Width on substrate (mils): 53.8
Reference plane spacing (mils): 55
The last two parameters, “50-Ohm Trace Width on substrate (mils)” and “Reference plane spacing (mils)” are for reference only. To determine the intrinsic properties and capabilities of a part, it is often valuable to characterize it with minimal exogenous parasitics, in this case, the fewest additional parasitic reactances beyond those of the basic capacitor spanning a gap in a microstrip trace. Generally, two conditions are necessary to accomplish this:
- Mounting pad dimensions that conform to those of the terminations on the part. (Note that most of the time this condition will not be practical in large-scale manufacturing, where mounting pads must be larger than part terminations to accommodate dimensional and placement tolerances and create room for solder fillets.)
- A 50-Ohm characteristic impedance trace width close to the part width. This (a) avoids the discontinuities created by large width disparities; and (b), for DC blocking applications where the series capacitive reactance and ESR can be neglected compared to the series inductive reactance, creates a per-unit-length series inductance and shunt capacitance close to that of a 50-Ohm line. Fig. 2 illustrates how the general equivalent circuit for a multi-layer ceramic capacitor on microstrip approximately reduces, for a DC blocking application, to the lumped equivalent circuit for a short length of transmission line.
Fig. 2 General equivalent circuit for MLCC on microstrip (left) approximately reduces, for DC block, to lumped equivalent circuit for short length of transmission line (right)
PPI has created at least one set of scattering matrices in each series where the reference planes closely coincide with the nominal part edges, and where the 50-Ohm trace width on a particular substrate is close to the nominal part width. Mounting pad dimensional limitations in the models determined to what degree these conditions could be achieved.
DISCLAIMER: Passive Plus Inc. (PPI) has made every effort to make this information as accurate as possible. However, no responsibility is assumed by PPI for its use or for any infringements of rights of third parties that may result from its use. PPI reserves the right to revise the content or modify its product line without prior notice.
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